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Cognitive radio (CR) technology has been proposed as a promising solution for maximizing the utilization of already-crowded spectrum resources. As new algorithms, circuits and systems are developed for CR technology, it is essential to have a reconfigurable testbed system for their verification. A multistandard, fully software driven, cross-layer CR testbed(More)
This paper presents a 25 dBm outphasing power amplifier designed in a standard 45 nm CMOS process. Instead of using bulky quarter-wave transmission lines or transformers as non-isolated combiners, we propose a new combiner based on lump elements. The elements of the combiner act differently for in-phase and out-of-phase components, which allows additional(More)
This paper presents a 23 dBm fully digital transmitter designed in a standard 45 nm CMOS process. The digital transmitter replaces the entire analog/RF signal chain in a traditional transmitter architecture. It utilizes ΣΔ modulation and pulse-width modulation to turn high resolution baseband I and Q signals into switching signals, thereby(More)
A low-power technique for a static random-access memory (SRAM)-based on-chip arbitrary-waveform generator (AWG) is proposed for two types of analog-signal-processing applications: multiresolution spectrum sensing and matched filter. The SRAM has an embedded address generator to limit the operation in a sequential-access mode of the AWG. Then, the power(More)
This paper presents a peaking PA bias circuit for an Average Power Tracking (APT) CMOS Doherty PA, where the common supply voltage changes as the target average power changes. In order to have Doherty efficiency characteristics with APT, the peaking PA must have an adaptive bias circuit that shifts the bias as the supply voltage changes, activating the(More)