Jongsok Choi

Publications
Influence

LegUp: high-level synthesis for FPGA-based processor/accelerator systems

Andrew Canis, Jongsok Choi, +5 authors T. Czajkowski
Computer Science
FPGA '11
27 February 2011

In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. Expand

LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems

Andrew Canis, Jongsok Choi, +5 authors J. Anderson
Computer Science
TECS
1 September 2013

We introduce a new high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. Expand

A Survey and Evaluation of FPGA High-Level Synthesis Tools

R. Nane, V. Sima, +9 authors K. Bertels
Engineering, Computer Science
IEEE Transactions on Computer-Aided Design of…
1 October 2016

High-level synthesis (HLS) is increasingly popular for the design of high performance and energy-efficient heterogeneous systems, shortening time-to-market and addressing today's system complexity. Expand

Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems

Jongsok Choi, Kevin Nam, Andrew Canis, J. Anderson, S. Brown, T. Czajkowski
Computer Science
IEEE 20th International Symposium on Field…
29 April 2012

We describe new multi-ported cache designs suitable for use in FPGA-based processor/parallel-accelerator systems, and evaluate their impact on application performance and area. Expand

From software threads to parallel hardware in high-level synthesis for FPGAs

Jongsok Choi, S. Brown, J. Anderson
Computer Science
International Conference on Field-Programmable…
1 December 2013

We describe the support within high-level hardware synthesis (HLS) for two standard software parallelization paradigms: Pthreads and OpenMP. Expand

Impact of FPGA architecture on resource sharing in high-level synthesis

Stefan Hadjis, Andrew Canis, +4 authors T. Czajkowski
Computer Science
FPGA '12
22 February 2012

Resource sharing is a key area-reduction approach in high- level synthesis (HLS) in which a single hardware functional unit is used to implement multiple operations in the high-level circuit specification. Expand

From software to accelerators with LegUp high-level synthesis

Andrew Canis, Jongsok Choi, +9 authors J. Anderson
Computer Science
International Conference on Compilers…
29 September 2013

This paper presents on overview of the LegUp design methodology and system architecture, and discusses ongoing work on profiling, hardware/software partitioning. Expand

The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs

Qijing Huang, Ruolong Lian, +4 authors J. Anderson
Computer Science
IEEE 21st Annual International Symposium on Field…
28 April 2013

We consider the impact of compiler optimizations on the quality of high-level synthesis (HLS)-generated FPGA hardware. Expand

High-level synthesis with LegUp: a crash course for users and researchers

J. Anderson, S. Brown, Andrew Canis, Jongsok Choi
Computer Science
FPGA '13
11 February 2013

We introduce LegUp, an open-source HLS tool for FPGAs developed at the University of Toronto that supports the synthesis of most of the C language to hardware, including loops, structs, multi-dimensional arrays, pointer arithmetic, and floating point operations. Expand

The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware

Qijing Huang, Ruolong Lian, +5 authors J. Anderson
Computer Science
TRETS
19 May 2015

We consider the impact of compiler optimizations on the quality of high-level synthesis (HLS)-generated field-programmable gate array (FPGA) hardware. Expand

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