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STUDY OBJECTIVE To evaluate and describe our experience in the management of recurrent second-trimester miscarriage and preterm delivery by laparoscopic transabdominal cervicoisthmic cerclage (LTCC), after failure of transvaginal cervical cerclage. DESIGN Retrospective review (Canadian Task Force classification III). SETTING Tertiary care teaching(More)
BACKGROUND Successful outcomes following high tibial osteotomy (HTO) require precise realignment of the mechanical axis of the lower extremity. The present study investigated whether the weight-bearing limb scanogram (WBS) technique provided a more accurate mechanical axis realignment than the navigation technique in open high tibial osteotomy (OHTO). (More)
STUDY DESIGN Retrospective study. PURPOSE To estimate the usefulness of bone scan and magnetic resonance imaging (MRI) for the diagnosis of new fracture in osteoporotic vertebral fractures. OVERVIEW OF LITERATURE The diagnosis of new fractrure in osteoporotic vertebral fractures requires simple X-ray and supplementary studies. METHODS We analyzed 87(More)
A time-interleaved flash-SAR ADC architecture has been suggested for high speed A/D conversion. Owing to the MSBs determined by the front end flash ADC, SAR ADC completes the A/D conversion in a reduced number of cycles. Time-interleaved SAR ADCs with a commonly shared low resolution flash ADC provide a new size and power efficient high speed ADC(More)
Recently, cylinders subjected to external pressure have become a point of interest in the nuclear industry due to their application to advanced small and medium-sized light water reactors. For instance, once-through type steam generator (SG) tubes, in which primary coolant flows outside the tubes while secondary water flows inside the tubes, consist of(More)
A power-efficient and speed-enhancing technique for time-interleaved (TI) SAR ADCs that is assisted by a lowresolution flash ADC is presented. The 3 b MSBs achieved from a flash ADC at every clock save two decision cycles from every SAR ADC channel, resulting in a reduced number of time interleaving channels with a total 27% energy saving compared with the(More)
A Time-domain latch interpolation technique is presented for low power flash analog-to-digital converter (ADC). The proposed technique reduces the number of first stage latches by half, and thus, reduce power consumption and hardware complexity. A prototype 6bit 1GS/s flash ADC was designed for concept proof in a 90nm CMOS process. The first stage(More)