John R. Sacha

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An important technique for reducing pow er consumption in VLSI systems is strength reduction, the substitution of a less-costly operation such as a shift, for a more-costly operation such a multiplication. Using a logarithmic number represen tation provides sev eral opportunities for strength reductions; in particular, m ultiplicationis performed as the(More)
In low power VLSI design, fixed point number representations are standard. For some signal processing applications, however, achieving sufficient dynamic range with fixed point may lead to computations utilizing more precision than necessary. In such cases, trading precision for dynamic range through the use of floating point and logarithmic number system(More)
LNS is applicable for low-power design at logic level because it reduces the bit activity. A design parameter that is often neglected despite playing a key role in an LNS-based processor performance is the base of the logarithm b [4], [5], as demonstrated in Fig. 1. The choice of base has a substantial impact on the average bit activity. Figure 1 shows(More)
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