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Phase Change Memory (PCM) is an emerging memory technology that can increase main memory capacity in a cost-effective and power-efficient manner. However, PCM cells can endure only a maximum of 10<sup>7</sup> - 10<sup>8</sup> writes, making a PCM based system have a lifetime of only a few years under ideal conditions. Furthermore, we show that(More)
Phase Change Memory (PCM) is emerging as a scalable and power efficient technology to architect future main memory systems. The scalability of PCM is enhanced by the property that PCM devices can store multiple bits per cell. While such Multi-Level Cell (MLC) devices can offer high density, this benefit comes at the expense of increased read latency, which(More)
Autonomic personal computing is personal computing on autonomic computing platforms. Its goals combine those of personal computing with those of autonomic computing. The challenge of personal autonomic computing is to simplify and enhance the end-user experience, delighting the user by anticipating his or her needs in the face of a complex, dynamic, and(More)
There are five main components to the cost of delivering computing in a data center: (i) the construction of the data center building itself; (ii) the power and cooling infrastructure for the data center; (iii) the acquisition cost of the servers that populate the data center; (iv) the cost of electricity to power (and cool) the servers; and (v) the cost of(More)
We study memories capable of storing multiple bits per memory cell, with the property that certain state transitions &#x201C;wear&#x201D; the cell. We introduce a model that is relevant for Phase Change Memory, a promising emerging nonvolatile memory technology that exhibits limitations in the number of particular write actions that one may apply to a cell(More)
—A fundamental constraint in the use of newer NAND Flash devices in the enterprise space is the low cycling endurance of such devices. As an example, the latest 2-bit MLC devices have a cycling endurance ranging from 3K to 10K program/erase cycles. Upcoming higher-density devices are expected to have even lower endurance. In this paper we propose a coding(More)
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We recently proposed Start-Gap as a simple low-overhead mechanism to do near-perfect wear leveling in phase change memories. This method was extended to handle a malicious attack, Repeat Address Attack (RAA), and provided a lifetime of several months under such an attack. A recent study has argued that an attacker can use Birthday Paradox Attack (BPA) to(More)