John Keen

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Even with today's large caches, the increasing performance gap between processors and memory systems imposes a memory bottleneck for many important scientific and commercial applications. This bottleneck is intensified in shared-memory multiprocessors by contention and the effects of cache coherency. Under heavy memory contention, the memory latency may(More)
Eleven years ago, at ISCA 14, we published a paper titled, " Architecture of a Message-Driven Processor " [Dal87] marking the start of our J-Machine project at MIT. The project culminated with the construction of a working prototype in 1991 [Dal92] and the evaluation of this prototype in 1992 [NWD93, Spert93]. The J-Machine demonstrated the use of a(More)
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