John G. Elias

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A parallel implementation of a genetic algorithm used to evolve simple analog VLSI circuits is described. The parallel computer system consisted of twenty distributed SPARC workstations whose computational activity is controlled by the parallel environment coordination language Linda. Work-in-progress on using the parallel GA to realize optimized circuits(More)
This document describes a network architecture called Highball and a preliminary design for a prototype, wide-area data network designed to operate at speeds of 1 Gbps and beyond. It is intended for applications requiring high speed burst transmissions where some latency between requesting a transmission and granting the request can be anticipated and(More)
The naturalnessand variety of a touch-based hand gesture interface offers new opportunities for human-computer interaction.Using a new type of capacitive sensor array,a Multi-Touch Surface (MTS) can be createdthat is not limited in size, that can be presented in many configurations, that is robust under a variety of environmental operating conditions, and(More)
The use of switched capacitors as wide-range, programmable resistive elements in spatially extensive artificial dendritic trees (ADT's) is described. We show that silicon neuro-morphs with ADT's can produce impulse responses that last millions of times longer than the initiating impulse and that dynamical responses are tunable in both shape and duration(More)
A dendritic tree, as part of a silicon neuromorph, was modeled in VLSI as a multibranched, passive cable structure with multiple synaptic sites that either depolarize or hyperpolarize local "membrane patches," thereby raising or lowering the probability of spike generation of an integrate-and-fire "soma." As expected from previous theoretical analyses,(More)
A simple circuit is described that functions as an analog memory whose state and dynamics are directly controlled by pulsatile inputs. The circuit has been incorporated into a silicon neuron with a spatially extensive dendritic tree as a means of controlling the spike firing threshold of an integrate-and-fire soma. Spiking activity generated by the neuron(More)