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| The PARADIGM (PARAllelizing compiler for DIstributed-memory General-purpose Multicomputers) project at the University of Illinois provides a fully automated means to parallelize programs, written in a serial programming model, for execution on distributed-memory multicomputers. To provide eecient execution, PARADIGM automatically performs various(More)
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructure as they serve as a key line of defense in network protection. However, current methods are much too compute intensive and can not begin to meet the bandwidth requirements of a(More)
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process , and as a result several research efforts have been undertaken to parallelize this algorithm. Most previous parallel approaches to cell placement annealing have used a parallel moves approach. In this paper we investigate two new(More)
A flexible compiler framework for distributed-memory multi-computers automatically par-allelizes sequential programs. A unified approach efficiently supports regular and irregular computations using data and functional parallelism. M assively parallel distributed-memory multicomputers can achieve the high performance levels required to solve the Grand(More)
{ The PARADIGM compiler project provides an automated means to parallelize programs, written in a serial programming model, for eecient execution on distributed-memory multicomputers. In addition to performing traditional compiler optimizations , PARADIGM is unique in that it addresses many other issues within a uniied platform: automatic data distribution,(More)
The use of parallel platforms, despite increasing availability, remains largely restricted to well-structured, numeric applications. We address the issue of facilitating the use of parallel platforms on unstructured problems through object-oriented design techniques and the actor model of concurrent computation. We present a multi-level approach to(More)
Parallel algorithms developed for CAD problems today suuer from three important drawbacks. First, they are machine speciic and tend to perform poorly on architectures other than the one for which they were designed. Second, they cannot use the latest advances in improved versions of the sequential algorithms for solving the problem. Third, the quality of(More)
Combinational logic synthesis is a very important but compu-tationally expensive phase of VLSI system design. Parallel processing offers an attractive solution to reduce this design cycle time. In this paper, we describe ProperMIS, a portable parallel algorithm for logic synthesis based on the MIS multi-level logic synthesis system. As part of this work, we(More)
Simulated annealing, a methodology for solving combinatorial optimization problems, is a very computationally expensive algorithm, and as such, numerous researchers have undertaken efforts to parallelize it. In this paper, we investigate three of these parallel simulated annealing strategies when applied to standard cell placement, specifically the(More)