Johannes Fieres

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This paper introduces a novel design of an artificial neural network tailored for wafer-scale integration. The presented VLSI implementation includes continuous-time analog neurons with up to 16 k inputs. A novel interconnection and routing scheme allows the mapping of a multitude of network models derived from biology on the VLSI neural network while(More)
In this article, we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic synapses that is currently under development, and we sketch the conceptual challenges that arise from(More)
An analog VLSI hardware architecture for the distributed simulation of large-scale spiking neural networks has been developed. Several hundred integrated computing nodes, each hosting up to 512 neurons, will be interconnected and operated on un-cut silicon wafers. The electro-technical aspects and the details of the hardware implementation are covered in a(More)
Scanned ion pencil beams carry a low-dose envelope which can extend up to several centimeters from the individual beam central axis. Depending on the energy and species of the beam, this halo consists mainly of secondary particles produced by nuclear interactions in the target or of particles undergoing multiple Coulomb scattering in the beam line(More)
Convolutional neural networks are known to be powerful image classifiers. In this work, a method is proposed for training convolutional networks for implementation on an existing mixed digital-analog VLSI hardware architecture. The binary threshold neurons provided by this architecture cannot be trained using gradient-based methods. The convolutional layers(More)
This work presents an incremental training approach that allows for the use of simple evolutionary algorithms to efficiently train the weights of fast mixed-signal hardware neural networks. The training strategy is tested on a set of common classification benchmark problems (E.coli, yeast, thyroid and wine) and the results are comparable to those of other(More)
Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward manner, while the output layer is trained using the supervised Perceptron rule. The system is designed for implementation on an existing low-power analog hardware architecture, exhibiting(More)
This paper presents a platform for the parallel operation of VLSI neural networks allowing to seamlessly map neural network topologies on distributed resources. The scalable approach provides fast isochronous communication channels transporting the neuron signals between single network modules. The network modules are printed circuit boards hosting a(More)
OBJECTIVES Medical informatics, neuroinformatics and bioinformatics provide a wide spectrum of research. Here, we show the great potential of synergies between these research areas on the basis of four exemplary studies where techniques are transferred from one of the disciplines to the other. METHODS Reviewing and analyzing exemplary and specific(More)