Johan Stärner

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In this paper we present a performance comparison between a real-time multiprocessor kernel implemented in hardware and a corresponding kernel implemented in software. The hardware kernel showed overall better performance. For instance the speedup achieved with the hardware kernel was up to 2.6 times. We also present an optimization that has been applied to(More)
Real time kernels are implemented today in software or in a separate processor. One of the disadvantages of current implementation approaches is that the execution times for the Service Calls have a minimum and a maximum value. The time gap can be large, and in real time systems the worst case time is one of the factors which determine the utilisation(More)
Caches exploits locality of references to reduce memory access latencies and thereby improve processor performance. When an operating system switches application task or performs other kernel services, the assumption of locality may be violated because the instructions and data may no longer be in the cache when the preempted operation is resumed. Thus,(More)
In message based systems, interprocess communication (IPC) is a central facility. If the IPC part is ineffective in such a system, it will decrease the performance and response time. By implementing the IPC facility in hardware, the administration (scheduling, message handling, time-out supervising etc.), is reduced on the CPU , which leads to more time(More)
Cyclic debugging is the process of iteratively re-executing a failed execution in order to determine the cause of the failure, i.e., the bug. In this process, being able to correctly reproduce the faulty execution is an absolute necessity. In sequential, deterministic, non-real-time software, this reproducibility is inherent. However, when the execution is(More)
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