Joaquín Alvarado

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A method is presented allowing direct and continuous estimation of the excitability changes of single fiber terminal arborizations within the central nervous system. In essence, the method measures the current required to maintain a preset antidromic firing probability of the unit under study. This implies operation in a closed loop system controlled by a(More)
This work presents an Improved Charge Sheet compact Model (ICSM) especially valuable for distortion analysis, where precise calculation of derivatives of at least third order is required. A new expression for the charge is used in the calculation of the current. Vertical electric field, mobility and DIBL are represented using previously reported for other(More)
Triple-Gate FinFETs have been demonstrated to be promising to push further the down scaling of the CMOS technology, thanks to their high immunity against the so-called short channel effects. However, due to their three-dimensional (3-D) architecture, strong degradation of their analog characteristics has been reported, basically due to large extrinsic(More)
0026-2714/$ see front matter 2010 Elsevier Ltd. A doi:10.1016/j.microrel.2010.07.040 * Corresponding author. Tel.: +32 10 47 2564; fax: E-mail address: joaquin.alvarado@uclouvain.be (J. This paper presents a compact model for partially depleted SOI MOSFETs, which allows for describing the total dose and the single event effects. It incorporates both(More)
Triple-Gate FinFETs have been demonstrated to be promising to push further the down scaling of CMOS technology, because of their high immunity against the so-called short channel effects. However, due to their three-dimensional (3-D) architecture, strong degradation of their analog characteristics has been reported, basically due to large extrinsic(More)
In this paper, a semi-analytical extrinsic gate capacitance model for Triple Gate FinFET, based on three-dimensional numerical simulations, is presented. The model takes into account the source/drain electrode and contact areas. It includes 5 capacitance components that describe the different fringing electrical couplings that exist inside the FinFET(More)
In this paper we present the results of the implementation of a nanoscale double-gate (DG) MOSFET compact model, which includes hydrodynamic transport model, in Verilog-A in order to carry out circuit simulation. The model in Verilog-A is used with the SMASH circuit simulator for the analysis of the DC and transient behavior electrical CMOS circuits.(More)
A comparative investigation of high-energy neutrons effect on strained and non-strained devices with different geometries is presented. Both single-gate planar and multiple-gate (MuG) silicon-on-insulator (SOI) devices are considered. Device response to the neutron irradiation is assessed through the variations of threshold voltage and transconductance(More)
In this paper we present the results of the implementation of a nanoscale double-gate (DG) MOSFET compact model, which includes hydrodynamic transport model, in Verilog-A in order to carry out circuit simulation. The model in Verilog-A is used with the SMASH circuit simulator for the analysis of the DC and transient behavior electrical CMOS circuits. A(More)