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Since many of these notes are preliminary versions or may be publish~ elsewhere , they have a limited distribution only and are not for review. Copies of these notes are available from the author or the editor. A method for designing delay-insensitive circuits is presented based on a simple formalism. The communication behavior of a circuit with Its(More)
One of the most frequently used primitives in asyn-chronous control circuits is the C-element. The three most popular CMOS implementations of the C-element are compared with respect to energy-eciency, delay, and area, with an emphasis on energy. The three implementations have been introduced by Sutherland, Mar-tin, and Van Berkel. We show that in a typical(More)
This paper presents a method for designing a special type of asynchronous circuits, called Gasp circuits, and illustrates the method by a novel design of a low-latency, high-throughput FIFO, called a Square FIFO. The design method includes a graphical notation that permits the specification not only of circuit topology but also of the time separation(More)
I hereby declare that I am the sole author of this thesis. I authorize the University of Waterloo to lend this thesis to other institutions or individuals for the purpose of scholarly research. I further authorize the University of Waterloo to reproduce this thesis by photocopying or by other means, in total or in part, at the request of other institutions(More)
We introduce a simple model for calculating transistor sizes of an asynchronous control circuit. The model builds on the theory of Logical Effort and relates transistor sizes to the speed and energy consumption of a circuit. We show how to calculate transistor sizes quickly, how to calculate the speed limit of a circuit, and how to compare circuits in terms(More)