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In this paper, a framework of designing a low-error signed fixed-width multiplier that receives two n-bits operands and generates an n-bits product is proposed. The proposed error compensation circuit not only leads signed fixed-width multipliers to very low maximum error, mean error and mean-square error but also can be easily constructed with a simple(More)
The fixed-width multiplier is attractive to many multimedia and digital signal processing systems which are desirable to maintain a fixed format and allow a little accuracy loss to output data. In this paper, we propose a new error compensation circuit in Baugh-Wooley multiplier by using the dual group minor input correction (MIC) vector to lower input(More)
The controller in a controller-datapath system plays an important role in determining the system cycle time. A new approach based on precomputation technique is proposed to parallelize the execution of controller and datapath. The parallelized controller precomputes all possible next states and urgent control outputs in each state before control inputs(More)
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