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High-Speed Low-Power Viterbi Decoder Design for TCM Decoders
High-speed, low-power design of Viterbi decoders for trellis coded modulation (TCM) systems is presented in this paper. It is well known that the Viterbi decoder (VD) is the dominant moduleExpand
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An Efficient 4-D 8PSK TCM Decoder Architecture
This paper presents an efficient architecture for a 4-D eight-phase-shift-keying trellis-coded-modulation (TCM) decoder. First, a low-complexity architecture for the transition metric unit isExpand
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A fast ACSU architecture for Viterbi decoder using T-algorithm
Modern digital communication systems usually employ convolutional codes with large constraint length for good decoding performance, which leads to large complexity and power consumption in ViterbiExpand
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Memory-reduced MAP decoding for double-binary convolutional Turbo code
This paper presents a memory-reduced VLSI architecture for the decoding of double-binary convolutional Turbo code (DB CTC) using maximum a posteriori probability (MAP) algorithm. For such kind ofExpand
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Incorporating persuasion into a decision support system: The case of the water user classification function
Utility stakeholders often view autonomic feedback systems as valuable tools for moderating consumption of household resources (e.g. electricity). However, to be successful, such technology must beExpand
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Design of Low-Power Memory-Efficient Viterbi Decoder
This paper presents a new low-power memory-efficient trace-back (TB) scheme for high constraint length Viterbi decoder (VD). With the trace-back modifications and path merging techniques, up to 50%Expand
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Towards an optimal trade-off of Viterbi Decoder Design
Viterbi Decoder (VD) is widely used in modern communication systems. For low power applications, trace-back approach (TBA) is usually employed for the Survivor Memory Unit (SMU) of VD. However, TBAExpand
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Efficient decoder design for error correction codes
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AN ABSTRACT OF THE THESIS OF Lupin Chen for the degree of Master of Science in Electrical and Computer Engineering presented on September 4, 2007. Title: Modified VLSI Designs for Error Correction
approved: ______________________________________________________ Zhongfeng Wang Nowadays, error correction codes have become an integral part in almost all the modern digital communication andExpand
Low-complexity high-speed 4-D TCM decoder
This paper presents a low-complexity, high-speed 4-dimensional 8-ary Phase Shift Keying Trellis Coded Modulation (4-D 8PSK TCM) decoder. In the design, an efficient architecture for the transitionExpand