Jinhong Ahn

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A field-programmable gate array, coupled with an on-chip 2 Mb DRAM bank has been designed, to aid in the study of the trade-offs involved in the design of embedded DRAM for FPGAs. The memory can be used both as configuration storage, enabling reconfiguration in under 5 s, and application data memory , providing application logic executing on the array with(More)
This paper presents a double-side CMOS-carbon nanotube (CNT) sensor array for simple bare-die measurements in a medical environment based on a 0.35 μm standard CMOS process. This scheme allows robust measurements due to its inherent back-side rectifying diodes with a high latch-up resistance. In particular, instead of using pads, only two contact metal(More)
  • ArrayStylianos Perissakis, Yangsung Joo, Jinhong Ahn
  • 1999
A eld-programmable gate array, coupled with an on-chip 2 Mb DRAM bank has been designed, to aid in the study of the tradeoos involved in the design of embedded DRAM for FPGAs. The memory can be used both as conngura-tion storage, enabling reconnguration in under 5 s, and application data memory, providing application logic executing on the array with up to(More)
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