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In this paper, we study the propagation of slew dependent bounding signals and the corresponding slew problem in static timing analysis. The selection of slew from the latest arriving signal, a commonly used strategy, may violate the rule of monotonic delay. Several methods for generating bounding signals to overcome this difficulty are described. The(More)
We investigate the modeling and solution techniques of VLSI layout compaction using the constraint graph approach under various practical design considerations. In particular, we extend the graph method to the compaction of VLSI layout with mixed grid constraints in addition to the usual minimum- and maximum-type constraints. This is a mixed integer(More)
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the modified shortest and longest path method. The computational complexity of our algorithm is generally better than that of known algorithms in the literature. The implementation(More)
In recent years, many new algorithms have been proposed for performing a complete timing analysis of sequential logic circuits. In this paper, we present an incremental timing analysis algorithm. When an incremental design change is made on the logic network, this algorithm will identify the portion of design for which the timing is affected, and quickly(More)
  • Jin-fuw Lee
  • IEEE Trans. on CAD of Integrated Circuits and…
  • 1988
In recent years, IC layout compactors seem still confined to the use of simple spacing rules, while industrial processes for mask fabrication continue to use complex design rules. The simplicity in rules makes the construction of a fast compactor easier, but also limits its usefulness in the real design application. Furthermore, it seems inevitable to have(More)
A new hierarchical compactor, Himdayas (HIerarchical MAcro LAYout Assembler), has been developed for constructing big macro layouts. The hierarchical compaction problem is formulated as an integer linear programming (ILP) problem. In this paper, we present two novel algorithms to reduce the problem size, in order to make ILP approach practical. The first(More)
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