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Chip-to-wafer bonding is a promising technology for 3D integration due to high production yield using known good dies (KGDs). However, conventional chip-to-wafer 3D integration lowers production throughput because pick-and-place chip assembly is employed. To overcome the problem, we proposed a new chip-to-wafer 3D integration using self-assembly by which(More)
— We develop new via-last backside-via 3D integration technologies using a unique temporary adhesive system in which visible-light laser is employed for wafer debonding from glass carriers. The advanced 3D and TSV researches are driven in order to fabricate Si interposers with high-density TSVs and highly integrated 3D hetero chips at Global INTegration(More)