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Chip-to-wafer bonding is a promising technology for 3D integration due to high production yield using known good dies (KGDs). However, conventional chip-to-wafer 3D integration lowers production throughput because pick-and-place chip assembly is employed. To overcome the problem, we proposed a new chip-to-wafer 3D integration using self-assembly by which(More)
Micro-Raman spectroscopic technique has been employed to study the induced stress/strain by the metal microbumps in 3D-LSI Si die/wafer after wafer thinning and bonding, and the impact of bump spacing, bump size, bonding temperature and bonding force in the stress distribution in such a microbump bonded LSIs has been investigated. It is inferred that (i)(More)