Jiangwei Huang

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To aim at the positions interchange of pixels and their gray values change at the same time, we presented a random scrambling algorithm based on bit-planes of image. At first, we decomposed a gray image into several bit-plane images. Then we shuffled them by a random scrambling algorithm separately. Lastly, we merged the scrambled bit-plane images according(More)
Dynamic voltage scaling (DVS) is an effective technique for reducing the energy consumption in embedded systems. There are several advantages using DVS technique into compiler framework. This paper present a framework for reducing energy consumption in embedded processors using the dynamic compiler collaborate with DVS technique. Two algorithms are(More)
In this paper we introduce dynamic power management framework for multi-core embedded system. This is a novel architecture for multi-core embedded system. In this framework user can add user defined policies to the architecture. And user also can add some running constrains to the framework. This framework could parse the user input, and give the right(More)
Today many embedded systems are driven by battery. The power consumption is becoming a critical problem for devices which are battery-powered. In this paper we presented a new approach for power management. We partitioned the programs into different regions by compiler statically. And partitioning or merging regions dynamically according the performance(More)
Real-time transaction processing becomes concerns as embedded time coming rapidly. However, the transaction process in real-time embedded system still has some problems in resource utilization at present. In this paper, a classification is designed to differentiate the hard periodic real-time transactions and hard sporadic real-time transactions. The new(More)
Recent years, as the wide deployment of embedded and mobile devices , reducing the power consumption in order to extend the battery life become a major factor that a designer must consider when designing a new architecture. DVS is regarded as one of the most effective power reduction techniques. This paper focus on run-time compiler driven DVS for power(More)
Power consumption is becoming a primary concern as a result of tremendous increasing in computer power usage. Innumerable methods and techniques have been exploited to address this problem but few concentrate on collaborative approaches. This paper presents coordination mechanisms that integrate operating systems with compilers under power reduction(More)
In this paper we present a new modeling technique using software engineering tool Flow Model for modeling and solving the Dynamic Power Management (DPM) with complex behavioral characteristics. Using this tool we can model the whole system easily. Experimental results show that the proposed technique can achieve more than 12% power saving compared to other(More)