Jiang Brandon Liu

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An incremental simulation-based approach to fault diagnosisand logic debugging is presented. During each iterationof the algorithm, a single suspicious location is identifiedand fault modeled such that the functionality of the newdesign becomes "closer" to its specification. The methodis based on a simple and, at a first glance, counter-intuitivetheoretical(More)
With increasing chip interconnect distances, open-interconnect is becoming an important defect. The main challenge with open-interconnects stems from its non-deterministic real-life behavior. In this work, we present an efficient diagnostic technique for multiple open-interconnects. The algorithm proceeds in two phases. During the first phase, potential(More)
Fault diagnosis is important in improving the circuit-design process and the manufacturing yield. Diagnosis of today's complex defects is a challenging problem due to the explosion of the underlying solution space with the increasing number of fault locations and fault models. To tackle this complexity, an incremental diagnosis method is proposed. This(More)
This paper presents an improved behavioral modeling technique that generates large-signal models for nonlinear amplifiers or devices based on load-pull AM-AM and AM-PM measurement datasets. The generated behavioral model characterizes the incident and scattering waveforms at two ports in the frequency domain based on the large-signal scattering function(More)
Test model generation is crucial in the test generation process of a high-performance design targeted for large volume production. A key process in test model generation requires the extraction of a gate-level (logic) model from the transistor level representation of the circuit under test. Logic extraction is an error prone process due to extraction tool(More)
As timing requirements in today's advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such algorithms capable of diagnosing multiple delay faults. One method uses multiple transition fault models and the other reasons with ternary logic values, thus achieving model(More)
— This article describes an accurate way to model a WLAN transmitter in a Co-Simulation Environment. Simulated and measured results are shown to be in good agreement for a 5 GHz 802.11a RF transmitter. The model was then used to explore the optimum operating point of the system by tuning the result for the Complementary Cumulative Distribution Function(More)
Table of content: We report on a hybrid sheet-based manufacturing approach for organic electrochemical transistors comprising printing and a self-aligning laser ablation step. Abstract We report on a hybrid manufacturing approach for organic electrochemical transistors (OECTs) on flexible substrates. The technology is based on conventional and digital(More)