JiaGuang Sun

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We describe how a recently proposed way to split input operands allows for fast VLSI implementations of GF (2)[x] Karatsuba-Ofman multipliers. The XOR gate delay of the proposed multiplier is better than that of previous Karatsuba-Ofman multipliers. For example, it is reduced by about 33% and 25% for n = 2 i and n = 3 i (i > 1), respectively. complexity(More)
The performance of a given cache architecture is largely determined by the behavior of the application using the cache. Reconfigurable cache is an effective low-power technique. Using the technique, microprocessor's cache can be configured dynamically to adapt itself to the requirement of running program, and minimize the energy consumption and performance(More)
Interconnect congestion estimation plays an important role in the physical design of integrated circuits. This paper presents a novel probabilistic approach to predicting wiring space in two-dimensional arrays. We propose a hierarchical estimation method to derive approximated upper bounds for wiring space. We use the net density distribution for predicting(More)
We describe how a simple way to split input operands allows for fast VLSI implementations of subquadratic GF (2)[x] Karatsuba-Ofman multipliers. The theoretical XOR gate delay of the resulting multipliers is reduced significantly. For example, it is reduced by about 33% and 25% for n = 2 t and n = 3 t (t > 1), respectively. To the best of our knowledge,(More)
PLC (Programmable Logic Controller) program in automatic control is vital to this kind of safety-critical applications. In this paper, we present a useful method of compositional model checking for verification of PLC programs. The method is based on the work pattern and the system model of PLC for modelling PLC program. Because the state space explosion(More)
To verify the safety of nonlinear dynamical systems based on inductive invariants, key issues include defining the most complete inductive condition and discovering an inductive invariant that satisfies the specified inductive condition. In this paper, to lay a solid foundation for future research into the safety verification of semi-algebraic dynamical(More)
The correctness verification of embedded control software has become an important research topic in embedded system field. The paper analyses the present situation on correctness verification of control software as well as the limitations of existing technologies. In order to the high reliability and high security requirements of control software, the paper(More)
The correctness of PLC (Programmable Logic Controller) program in automatic control is vital to this kind of safety-critical applications. In this paper, we present a useful method of combinational model-checking for correctness of PLC programs. The method is based on the denotational semantics of PLC program and the semantic functions for basic(More)
Fault localization is a critical procedure in software development process. Previous studies based their research on the precondition that test results are conveniently acquired and 100% correct, which does not happen in the real world. In this article, we propose the concept of γ- reliable test-suite to demonstrate the potential unreliability of(More)