Jeongseon Euh

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Signal processing algorithms and architectures can use dynamic reconfiguration to exploit variations in signal statistics with the objectives of improved performance and reduced power consumption. Parameters provide a simple and formal way to characterize incremental changes to a computation and its computing mechanism. This paper examines five(More)
The effect of texture mapping in enhancing the realism of computer-generated images has made the support for real-time texture mapping a critical part of 3D graphics pipelines. However, the texture mapping is one of the major power consumers in 3D graphics pipelines due to the intensive interpolation computation and high memory bandwidth. This power(More)
Real-time 3D Graphics rendering consumes significant power because of its very high computation and memory access rate. Due to variation in workload and perceptual tolerance, power-awareness can optimize this power consumption significantly, thus facilitating migration to future power-constrained devices such as PDAs, tablets, wearables, phones etc. This(More)
Real-time 3D graphics will be a major power consumer in future portable embedded systems. In this paper we present a 3D CORDIC vector interpolator for power-aware graphics system. This new interpolator supports dynamic control of computing precision with an output accuracy range of 6 to 10 bits. The output precision control of this interpolator exploits the(More)
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