Jens Sauerbrey

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In this paper, a 12 bit Successive Approximation Analog to Digital Converter has been designed which has high resolution, less power consumption and medium speed. The circuit has been designed and simulated on Cadence tool in 0. 35μm AMS technology with a supply voltage of 3. 3V. Different ADC architectures are present but this SAR ADC has a salient feature(More)
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