We present an overview of Infinera's current generation of 100 Gb/s transmitter and receiver PICs as well as results from the next-generation 500 Gb/s PM-QPSK PICs.
A coherent MODEM is implemented with FEC payload and checksum distributed between two PM-QPSK optical channels spaced at 200 GHz. Real-time experiments verify PDL and PMD penalties are 40-50% higher without FEC gain sharing.
Accelerator control systems should be flexible and open for future improvements. The introduction of a field bus based I/O system is a step in this direction. At BESSY most of the accelerator devices are interfaced using the BESSY modular I/O system and the Controller Area Network (CAN), which provides excellent noise immunity and a sophisticated, reliable… (More)
The BESSY II control system takes advantage of the mature stage of the EPICS toolkit and its contributed generic applications. Development activities have been focussed on three aspects. (1) Dominant role is given to device control IO, based on distributed local intelligence of embedded controllers and CAN fieldbus networks. (2) Cooperative development of… (More)