Jeffrey R. Fox

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Present VLSI synthesis programs typically characterized as silicon compilers employ a predefined floorplan and fixed placement of functional elements. Significant broadening of the areas of application and more effective utilization of silicon space can be obtained by using a general placement of functionally clustered elements rather than a fixed(More)
We describe the language and features of <italic>Silc</italic><supscrpt>TM</supscrpt>, a new silicon compiler. Silc<supscrpt>TM</supscrpt> takes an algorithmic description of a circuit, performs logic synthesis, optimization, and physical layout synthesis, and produces a mask-level description. Special features of the compiler include multiple data path(More)
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