Jeff A. Babcock

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We present an overview of negative bias temperature instability ͑NBTI͒ commonly observed in p-channel metal–oxide–semiconductor field-effect transistors when stressed with negative gate voltages at elevated temperatures. We discuss the results of such stress on device and circuit performance and review interface traps and oxide charges, their origin,(More)
The linearity of electrically-matched NPN and PNP silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) on insulator (SOI) under weakly-saturated conditions, at both room temperature (300 K) and an elevated temperature (373 K), is investigated and compared for the first time. In addition, the potential circuit leverage associated with using(More)
This paper presents the characterization of intermodulation distortion in pnp SiGe HBTs on SOI. For the first time, measured results of pnp SiGe HBTs are compared against Spectre-based simulations using both HICUM and VBIC compact models, after the systematic selection of the appropriate corner models. It is shown that the HICUM model more accurately(More)
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