Jean-Luc Ogier

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This paper presents the real impact of transistor geometry on the NBTI degradation. I<sub>Dsat</sub> degrades faster longer transistors, which is attributed to the small relative saturation region with respect to the total channel length. Narrow transistor degradation is accelerated by the contribution of the edge of the active region. Transistor lifetime(More)
This study is driven by the need to improve the oxide reliability of a memory cell. The effects of dynamic high electric field stressing on thin oxide have been studied. Difference between time to breakdown with static stress and dynamic stress has been shown. Trapped charge in interface states under dynamic and static oxide field stress has been(More)
Device degradation modelling is more and more important for reliable circuit design. On MOSFET, the threshold voltage drift in time can lead to circuit performance degradation. In this study, VT shift due to Hot Carrier Injection stress is accelerated on small width devices. VT matching is also degraded during stress as a function of VT deterioration. This(More)