Jean-Luc Nagel

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Inexact Circuits or circuits in which the accuracy of the output can be traded for energy or delay savings, have been receiving increasing attention of late due to invariable inaccuracies in designs as Moore's law approaches the low nanometer range, and a concomitant growing desire for ultra low energy systems. In this paper, we present a novel design-level(More)
In very deep submicron technologies (< 0.13 μm) the leakage power consumption becomes an important contribution to total power consumption. Consequently a new low-power design methodology will be required at circuit, architectural and system levels. This paper focuses on architecture comparison and aims at selecting the one with the minimum total power(More)
This paper reports the results obtained of applying the Discrete Walsh-Hadamard Transform (DWHT) in a video coding scheme. It will be shown that for low bitrate applications the DWHT can reach performances analogous to those obtained with the Discrete Cosine Transform (DCT) in terms of compression efficiency, PSNR, and visual quality. This suggests the use(More)
This paper reports a low-power multiscale morphological coprocessor for mobile face authentication devices. In such a system, face verification is performed by extracting mathematical morphology features (erosions and dilations) using a set of structural elements of increasing size. The proposed architecture reduces the number of operations by reusing(More)
This paper introduces a novel low-power VLSI architecture dedicated to algorithms based on elastic graph matching. The targeted application is face verification for low-power mobile devices (e.g. mobile phones, personal digital assistants, wearable computing devices). A description of the overall verification system is provided jointly to a detailed(More)