Jean-Christophe Le Lann

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—General-purpose shared memory multicore architectures are becoming widely available. They are likely to stand as attractive alternatives to more specialized processing architectures such as FPGA and DSP-based platforms to perform real-time digital signal processing. In this paper, we show how we can ease parallelism expression on shared memory multicore(More)
Today, developments of Real Time Embedded Systems have to face new challenges. On the one hand, economic laws require a reliable development process allowing quick design space exploration. On the other hand, rapidly developing technology, as described by Moore's law, requires techniques to handle the resulting productivity gap. In a previous paper, we have(More)
—With the advent of multicore processor architec-tures and the existence of a huge legacy code base, the need for efficient and scalable parallelizing compilers is growing. Where multi-core processors were seen as the way forward to address the known challenges such as the memory, power and ILP wall, efficient parallelization to make use of the multiple(More)