Jason C. Chen

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—To design the hardware for image signal processing pipelines in digital still cameras (DSCs) and video camcoders, it is a dilemma for conventional solutions, such as application-specific integrated circuits (ASICs) and digital signal processors (DSPs), to achieve high processing capability at low cost while maintaining high flexibility for various(More)
This paper presents a novel preview-based coarse-CCD Balance Interpolation Correction filtering D grain reconfigurable image signal processor (CRISP) for digital sensor still cameras (DSCs). The two modes in DSCs, which have quite different hardware considerations, make traditional implementa-Fig. 1. Image processing pipeline example for preview mode. tion(More)
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