Jared Sherman

Learn More
The memory wall (the gap between processing and storage speeds) remains a concern to computer systems designers. Caches have played a key role in hiding the performance gap by keeping recently ac-cessed information in fast memories closer to the processor. Multi and many core systems are placing severe demands on caches, exacerbating the performance(More)
There is a growing interest in using 3-D DRAM structures and non-volatile memories such as Phase Change Memories (PCM) to both improve access latencies and reduce energy consumption in multi-core systems. These new memory technologies present both opportunities and challenges to computer systems design. In this paper we address how such memories should be(More)
We present a method for imposing hierarchal structure on segmented images using probabilistic context-free grammars (PCFGs). The notion of PCFG, which has been used in the past to characterize 1D word strings, is extended to characterize 2D images as well. The inside-outside algorithm is then extended to support training, classification, and parsing on(More)
\Adjustment of an inverse matrix corresponding to changes in the elements of a given column or a given row of the original matrix," Ann. 22 large systems. Isospeed scalability is a dimensionless scalar. It is easy to understand and is independent of sequential processing. When an initial speed is chosen, average speed is independent of problem size, system(More)
  • 1