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In this article, we present an efficient way of implementing 90° phase shifter using Hilbert transformer with canonic signed digit (CSD) coefficients in FPGA. It is implemented using 27-tap symmetric finite impulse response (FIR) filter. Representing the filter coefficients by CSD eliminates the need for multipliers and the filter is implemented using(More)
This paper presents a 10 Gb/s avalanche-photodiode-based DC-coupled reshaping and reamplifying (2R) burst-mode receiver with on-chip auto-reset generation and multiple data rate support, designed for 10G-GPONs. A short 2R settling time of 75 ns (150 ns for lower-rate operation), a high receiver sensitivity of -31.3 dBm, and a large loud/soft ratio of 25.3(More)
This paper presents a novel technique to protect the copyright information by embedding a bit map image as watermark into the frames of videos in such a way in could be extract to proof the ownership from the video contents. The proposed scheme produce a robust video watermarking scheme into two bands therefore named as multiband with strength ?1 and ?2(More)