Jan Kuper

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Stencil computations are array based algorithms that apply a computation to all array elements in a fixed regular pattern and can be found in many scientific and engineering applications. Parallelization of these applications becomes more and more important in order to keep up with the demand for computing power. FPGAs offer a lot of computing power but are(More)
—As embedded systems are becoming increasingly complex, the design process and verification have become very time-consuming. Additionally, specifying hardware manually in a low-level hardware description language like VHDL is usually an error-prone task. In our group, a tool (the CλaSH compiler) was developed to generate fully synthesisable VHDL code from a(More)
  • Christiaan Baaij, Jan Kuper, Lutz Schubert
  • 2012
—SoOSiM is a simulator developed for the purpose of exploring operating system concepts and operating system modules. The simulator provides a highly abstracted view of a computing system, consisting of computing nodes, and components that are concurrently executed on these nodes. OS modules are subsequently modelled as components that progress as a result(More)
This paper presents a design methodology for deriving an FPGA implementation directly from a mathematical specification, thus avoiding the switch in semantic perspective as is present in widely applied methods which include an imperative implementation as an intermediate step. The first step in the method presented in this paper is to transform a(More)
—In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code. The VHDL code was synthesised with 90 nm TSMC libraries(More)
  • Jan Kuper, Ir Marco, Gerards Ir Bert Molenkamp, Sabih Gerez
  • 2009
A Functional hardware description languages are a class of hardware description languages that emphasize on the ability to express higher level structural properties, such a parameterization and regularity. Due to such features as higher-order functions and polymorphism, parameterization in functional hardware description languages is more natural(More)
  • Jan Kuper, Christiaan Baaij, Matthijs Kooijman, Marco Gerards
  • 2011
This paper introduces CλaSH, a novel hardware specification environment, by discussing several non-trivial examples. CλaSH is based on the functional language Haskell, and exploits many of its powerful abstraction mechanisms such as higher order functions, polymorphism, lambda abstraction, pattern matching, type derivation. As a result, specifications in(More)
  • Marco Gerards, Christiaan Baaij, Jan Kuper, Matthijs Kooijman
  • 2010
Synchronous hardware can be modelled as a mapping from input and state to output and a new state. Functions in this form are referred to as transition functions. It is natural to use a functional language to implement transition functions. The CλaSH compiler is capable of translating Haskell code written in this form to VHDL. Modelling hardware using(More)
To apply model-based design to embedded systems that interface with the physical world, including simulation and verification, current tools fall short. They must provide mathematical (model) definitions that stay close to the specification of the system. They must allow multiple domains, such as the continuous-time, discrete-time and dataflow domain, in a(More)
  • Kenneth C Rovers, Jan Kuper, Gerard J M Smit
  • 2008
—For a generic flexible efficient array antenna receiver platform a hierarchical tiled architecture has been proposed, giving a heterogeneous multi-processor system-on-chip (MPSoC), multiple chips on a board (MCoB) and multiple boards in a system (MBiS). A wide range of MPSoCs are predicted to be used in the near future but how to efficiently apply these(More)