James H. Stathis

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The microelectronics industry owes its considerable success largely to the existence of the thermal oxide of silicon. However, recently there is concern that the reliability of ultra-thin dielectrics will limit further scaling to slightly thinner than 2nm. I will review the physics and statistics of dielectric wearout and breakdown in ultra thin SiO2-based(More)
Negative and Positive Bias Temperature Instabilities (NBTI (in PFET) and PBTI (in NFET)) weaken MOSFETs with time. The impact of such device degradation can be severe in Static Random Access Memories (SRAMs) wherein stability is governed by relative strengths of FETs. Degradation in stability with time under ‘worst case condition’ gets more important(More)
Resilience to hardware failures is a key challenge for a large class of future computing systems that are constrained by the so-called power wall: from embedded systems to supercomputers. Today's mainstream computing systems typically assume that transistors and interconnects operate correctly during useful system lifetime. With enormous complexity and(More)
Article history: Received 29 June 2010 Accepted 14 July 2010 Available online 5 August 2010 0026-2714/$ see front matter 2010 Elsevier Ltd. A doi:10.1016/j.microrel.2010.07.017 * Corresponding author. Tel.: +1 914 945 2559; fax E-mail address: stathis@us.ibm.com (J.H. Stathis). Hot-carrier degradation and bias-temperature instability of FinFET and(More)