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The IBM zEnterprise A system introduced a new and innovative redundant array of independent memory (RAIM) subsystem design as a standard feature on all zEnterprise servers. It protects the server from single-channel errors such as sudden control, bus, buffer, and massive dynamic RAM (DRAM) failures, thus achieving the highest System z A memory availability.(More)
We describe bandwidth-on-demand in an evolved multilayer, software-defined networking (SDN) based cloud services model. We present motivation for using a multilayer architecture for the wide-area network (WAN). Our laboratory testbed is described, and both the hardware and management architecture are presented. We also show an initial proof-of-concept(More)
In this article we describe a class of error control codes called “diff-MDS” codes that are custom designed for highly resilient computer memory storage. The error scenarios of concern range from simple single bit errors, to memory chip failures and catastrophic memory module failures. Our approach to building codes for this setting relies on(More)
Speed bumps are commonly used to control the traffic speed and to ensure the safety of pedestrians. This paper proposes a novel speed bump energy harvester (SBEH), which can generate large-scale electrical energy up to several hundred watts when the vehicle drives on it. A unique design of the motion mechanism allows the up-and-down pulse motion to drive(More)
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