Jalal Jomaah

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Low frequency noise characterisation of 0.12 μm SOI CMOS technology was performed for Partially and Fully Depleted N-MOSFETs. Static performances are first presented, then we address the drain current fluctuations in both linear and saturation regimes. Taking into consideration the usually admitted 1/f noise models in MOS devices and their applicability in(More)
In this work, static and low frequency noise parameter extraction are carried out on surfaceand buried-mode 0.1 lm PMOSFETs. The two architectures are based either on a surface mode of operation (SC) or on a buried one (BC) featuring P+ and N+ polygate, respectively. The impact of the gate architecture i.e. P+ and N+ polysilicon, on the static and noise(More)
A compact Substrate Integrated Waveguide (SIW) Leaky-Wave Antenna (LWA) is proposed. Internal vias are inserted in the SIW in order to have narrow walls, and so reducing the size of the SIW-LWA, the new structure is called Slow Wave - Substrate Integrated Waveguide - Leaky Wave Antenna (SW-SIW-LWA), since inserting the vias induce the SW effect. After(More)
Since we know that quantum-mechanical effects are predominant in surrounding-gate MOSFETs, a model should be developed. For the first time, this paper presents an analytic model of quantization for thin cylindrical Si-Nanowire MOSFETs by using a variational approach. The model is implemented into a surface potential like model. It is shown that results(More)
Here in this article we propose a new design of Slow-Wave Substrate Integrated Waveguide (SW-SIW). The proposed design besides the miniaturization have the advantages of being low loss and Wide-Band. The reflection coefficient is decreased between 5dB and 10dB, the Band Width of the new transmission is almost 16.6GHz, the miniaturization is of 38% very(More)