it can be used for estimation in the early stages as well as for actual routing, thereby improving the convergence and timing closure of the design significantly. We also provide some valuable theoretical background and insights on delay optimization and on how it relates to our maze router implementation.
In this paper, we describe a simple and rapid method of fabricating hot embossing tools using polydimethylsiloxane (PDMS), which are then used to rapidly fabricate microchannels in polymethylmethacrylate (PMMA). A negative photoepoxy SU-8 or thick positive photoresist AZ4620 on silicon was used for molding during PDMS casting. Fabrication time of these PDMS… (More)
In this paper, we describe methods to speed up integrated placement and synthesis of high performance designs. We present an analysis of the computation times of various logic synthesis transforms. We then show techniques to reduce computation time based upon judicious selection of gates and nets for the resizing and buffering transforms, respectively. We… (More)