Jacques Graffeuil

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The noise behavior of microwave amplifiers operating under a large-signal condition has been studied in this paper. A Gaussian noise is added to a microwave signal and they are applied at the input of several amplifying devices. Experimental data show a decrease of the output noise spectral density when the power of the microwave signal at the input of the(More)
In this paper, we present the design of an integrated low noise amplifier (LNA) for WLAN applications in the 6 GHz range using a SiGe BiCMOS technology. The SiGe HBTs feature a cut-off frequency f/sub t/ higher than 40 GHz and maximum oscillation frequency f/sub max/ higher than 50 GHz. The design of some of the passive devices of the circuit has been(More)
In this paper, we present the design of an integrated low noise amplifier (LNA) for WLAN applications in the 6 GHz range using a low complexity SiGe BiCMOS technology. The SiGe HBTs used In the design feature a typical cut-off frequency "Ft" of 45 GHz and a typical maximum oscillation frequency "Fmax" of 60 GHz The LNA exhibits a 17 dB power gain with a 1.4(More)
The phase noise performance of two different microwave analog frequency dividers is characterized and compared with the values obtained using simple theories of noise in injection-locked systems. The direct measurement of the divider noise with a low phase noise synthesizer is not accurate enough, and the residual noise technique is used. The noise levels(More)
This paper addresses advanced low frequency noise measurements and modeling of SiGe HBTs. Results have been implemented into a nonlinear Gummel Poon model which has been validated through the design of a DRO made of an integrated SiGe negative resistance in the 10 GHz range. We have obtained phase noise of -105 dBc/Hz at 10 kHz offset, which is close to the(More)
This paper addresses some reliability properties of SiGe HBTs. We first verified that no major problems were related to the SiGe layer through DC life tests. In the second step, we investigated the hot carrier influence on the DC, noise and microwave properties of these devices. We found that some degradation was occurring at the extrinsic base region in(More)
This paper deals with a novel technological solution based on the use of surface micromachining in coplanar slots that are filled with a thick organic dielectric layer. This technique enables both Q factor and losses improvements of passive circuits realized on low resistivity silicon substrate. It permits indeed to achieve much better attenuation level(More)
2014 In this paper, the experimental results describing the substrate bias effect on the Schottky gate capacitance-voltage and the DC current-voltage characteristics of GaAs FET’s (N-type epilayer on semi-insulating Cr-doped substrate) are reported. These results are accounted for by the formation of a double space-charge in the N-layer and in the S.I.(More)