Jacobus W. Swart

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A novel multisampling time-domain architecture for CMOS imagers with synchronous readout and wide dynamic range is proposed. The architecture was implemented in a prototype of imager with 32x32 pixel array fabricated in AMS CMOS 0.35µm and was characterized for sensitivity and color response. The pixel is composed of an n+/psub photodiode, a comparator(More)
The development of ultra-low power LSIs is a promising area of research in microelectronics. Such LSIs would be suitable for use in power-aware LSI applications such as portable mobile devices, implantable medical devices, and smart sensor networks [1]. These devices have to operate with ultra-low power, i.e., a few microwatts or less, because they will(More)
For LOCOS application, silicon nitride (SiNx) insulators have been deposited by ECR–CVD at room temperature and with N2 flows of 2.5, 5, 10 and 20 sccm on pad-SiO2/Si or on Si substrates. The obtained SiNx/Si structures were used to analyze the SiNx characteristics. FTIR analyses reveal the presence of Si–N and N–H bonds. The refractive indexes between 1.88(More)
This paper presents a radiation hardened Active Pixel Sensor implemented in a standard 0.35μm CMOS process. The integrated circuit is composed of a 64x64 pixel matrix with a 25μm pixel pitch and has four different pixel architectures. There are also test structures to permit the characterization of the MOS transistors. The radiation hardening of(More)
A detailed analysis of the optical properties of silicon rich oxides (SRO) thin films and the factors that influence them is presented. SRO films with different Si content were synthesized via LPCVD (low pressure chemical vapor deposition) on sapphire substrates. Photoluminescence (PL), UV/Vis and Raman spectroscopy were used to characterize the samples. An(More)
A set of low noise transimpedance amplifiers fabricated and characterized in CMOS and BiCMOS technologies are proposed in this work. Layout optimization, efficient modeling and bias point optimization are the techniques employed to reduce the input noise current density. The CMOS amplifiers were designed to work at 10 Gbps. The BiCMOS amplifiers, based on(More)
Design guide lines are given for developing SiGe HBT mm-wave d.c. coupled ultra-wide-band low noise monolithic amplifiers. An ultra wide band LNA and two mm-wave TIAs for 40 Gbps and 100 Gbps applications are proposed. The LNA has S21=11 dB and a 3-dB bandwidth of 88 GHz. The 40 Gbps TIA has a new topology, allowing a DC coupled performance, 54 dBΩ(More)
Carbon nanotubes (CNTs) are attractive as nanosize structural elements from which devices can be constructed by bottom-up fabrication. A CNT is a macromolecule of carbon and is made by rolling a sheet of graphite into a cylindrical shape. CNTs exhibit excellent electrical properties that include current densities exceeding 109 A/cm2 and ballistic transport(More)