We don’t have enough information about this author to calculate their statistics. If you think this is an error let us know.
Learn More
Traditional latch-up (V<sub>DD</sub>-to-V<sub>SS</sub>) in CMOS IC's is formed by the parasitic p-n-p-n structure between VDD and VSS. In modern technologies, although the guard rings and substrate/ well pickups could efficiently overcome the latch-up failure in CMOS ICs, the latch-up failure phenomenon is still existed in many special application circuits.(More)
  • 1