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1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS
- S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, S. Shigematsu, J. Yamada
- Engineering
- 1 August 1995
1-V power supply high-speed low-power digital circuit technology with 0.5-/spl mu/m multithreshold-voltage CMOS (MTCMOS) is proposed. This technology features both low-threshold voltage and…
A 1-V high-speed MTCMOS circuit scheme for power-down application circuits
- S. Shigematsu, S. Mutoh, Y. Matsuya, Y. Tanabe, J. Yamada
- Engineering
- 1 June 1997
This paper proposes a new multithreshold-voltage CMOS circuit (MTCMOS) concept aimed at achieving high-speed, ultralow-power large-scale integrators (LSI's) for battery-driven portable equipment. The…
A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application
- S. Mutoh, S. Shigematsu, Y. Matsuya, H. Fukuda, T. Kaneko, J. Yamada
- Engineering
- 1 November 1996
TLDR
A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application
- S. Mutoh, S. Shigematsu, Y. Matsuya, H. Fukuda, J. Yamada
- Computer ScienceIEEE International Solid-State Circuits…
- 8 February 1996
TLDR
1 V power supply, low-power consumption A/D conversion technique with swing-suppression noise shaping
- Y. Matsuya, J. Yamada
- Engineering
- 1 December 1994
TLDR
A 20 kbit associative memory LSI for artificial intelligence machines
- T. Ogura, J. Yamada, S. Yamada, Masa'aki Tan'no
- Computer Science
- 1 August 1989
TLDR
2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V
- M. Harada, T. Tsukahara, J. Kodate, A. Yamagishi, J. Yamada
- EngineeringIEEE Journal of Solid-State Circuits
- 1 December 2000
2-GHz RF front-end circuits [low noise amplifier (LNA), mixer, and voltage-controlled oscillator (VCO)] enabling 0.5-V operation are presented. The circuits were fabricated by 0.2-/spl mu/m fully…
1V high-speed digital circuit technology with 0.5/spl mu/m multi-threshold CMOS
- S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, J. Yamada
- EngineeringSixth Annual IEEE International ASIC Conference…
- 27 September 1993
A 1-V high-speed and low-power digital circuit technology with 0.5/spl mu/m multi-threshold CMOS (MT-CMOS) is proposed. This technology applies both low-threshold voltage and high-threshold voltage…
A 0.5-V MTCMOS/SIMOX logic gate
- T. Douseki, S. Shigematsu, J. Yamada, M. Harada, H. Inokawa, T. Tsuchiya
- Engineering
- 1 October 1997
TLDR
0.5-1 V 2 GHz RF front-end circuits in CMOS/SIMOX
- M. Harada, T. Tsukahara, J. Yamada
- EngineeringIEEE International Solid-State Circuits…
- 7 February 2000
TLDR
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