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1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS
1-V power supply high-speed low-power digital circuit technology with 0.5-/spl mu/m multithreshold-voltage CMOS (MTCMOS) is proposed. This technology features both low-threshold voltage and…
A 1-V high-speed MTCMOS circuit scheme for power-down application circuits
This paper proposes a new multithreshold-voltage CMOS circuit (MTCMOS) concept aimed at achieving high-speed, ultralow-power large-scale integrators (LSI's) for battery-driven portable equipment. The…
A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application
This proposed scheme minimizes the standby power in the waiting state by effectively controlling the sleep mode in the MTCMOS design, and confirmed that the standby leakage current was reduced three orders of magnitude and the energy consumed in the waited state was less than 1/10 of that consumed by conventional CMOS circuits with lowered supply voltage and threshold voltage.
A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application
- S. Mutoh, S. Shigematsu, Y. Matsuya, H. Fukuda, J. Yamada
- Computer ScienceIEEE International Solid-State Circuits…
- 8 February 1996
This 1 V DSPLSI with 26 MOPS and 1.1 mW/MOPS performance adopts a multi-threshold-voltage CMOS (MTCMOS) technique to reduce power during waiting periods.
1 V power supply, low-power consumption A/D conversion technique with swing-suppression noise shaping
Experimental results indicated good performance for the RF-to-baseband analog interface of a digital cordless phone.
A 20 kbit associative memory LSI for artificial intelligence machines
The associative memory, with its highly efficient associative operation capabilities, promises to be a large step toward the development of high-performance artificial intelligence machines.
2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V
- M. Harada, T. Tsukahara, J. Kodate, A. Yamagishi, J. Yamada
- EngineeringIEEE Journal of Solid-State Circuits
- 1 December 2000
2-GHz RF front-end circuits [low noise amplifier (LNA), mixer, and voltage-controlled oscillator (VCO)] enabling 0.5-V operation are presented. The circuits were fabricated by 0.2-/spl mu/m fully…
1V high-speed digital circuit technology with 0.5/spl mu/m multi-threshold CMOS
- S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, J. Yamada
- EngineeringSixth Annual IEEE International ASIC Conference…
- 27 September 1993
A 1-V high-speed and low-power digital circuit technology with 0.5/spl mu/m multi-threshold CMOS (MT-CMOS) is proposed. This technology applies both low-threshold voltage and high-threshold voltage…
A 0.5-V MTCMOS/SIMOX logic gate
The effectiveness of the MTCMOS/SIMOX circuit is confirmed by an evaluation of a gate-chain test element group (TEG) and an experimental 0.5-V, 40-MHz, 16-b ALU, which were designed and fabricated with 0.25-/spl mu/m MTCmOS/ SIMOX technology.
0.5-1 V 2 GHz RF front-end circuits in CMOS/SIMOX
- M. Harada, T. Tsukahara, J. Yamada
- EngineeringIEEE International Solid-State Circuits…
- 7 February 2000
These 2 GHz receiver front-end blocks operate down to 0.5 V because of the use of undoped MOSFETs in the VCO core and buffers for the mixer and VCO, which have the same structure as normal (doped) ones except for the impurity concentration in their channel region.