J. Yamada

Publications64
h-index20
Citations2,559
Highly Influential Citations129
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1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS
TLDR
1-V power supply high-speed low-power digital circuit technology with 0.5-/spl mu/m multithreshold-voltage CMOS (MTCMOS). Expand
A 1-V high-speed MTCMOS circuit scheme for power-down application circuits
TLDR
This paper proposes a new multithreshold-voltage CMOS circuit (MTCMOS) concept aimed at achieving high-speed, ultralow-power large-scale integrators (LSI's) for battery-driven portable equipment. The "balloon" circuit scheme based on this concept preserves data during the power-down period in order to reduce the standby power. Expand
A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application
TLDR
A 1-V power supply low-power and high-speed 16-b fixed-point digital signal processor using a 0.5-/spl mu/m process has been developed for mobile phone applications. Expand
A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS
TLDR
We use a low-frequency equalizer to cancel the long ISI tail of the channel pulse response of a backplane channel (42.6dB loss at fs/2 for 32Gb/s) with conventional high-frequency channels. Expand
1 V power supply, low-power consumption A/D conversion technique with swing-suppression noise shaping
TLDR
A 1 V power supply and low-power consumption A/D conversion technique using swing-suppression noise shaping is proposed. Expand
A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application
TLDR
A low-power digital signal processor (DSP) is the key component for battery-driven mobile phone equipment since a vast amount of data needs to be processed for multimedia use. Expand
NV-SRAM: a nonvolatile SRAM with backup ferroelectric capacitors
TLDR
This paper demonstrates new circuit technologies that enable a 0.25-/spl mu/m ASIC SRAM macro to be nonvolatile with only a 17% cell-area overhead. Expand
1V high-speed digital circuit technology with 0.5/spl mu/m multi-threshold CMOS
TLDR
A 1-V high-speed and low-power digital circuit technology with 0.5/spl mu/m multi-threshold CMOS (MT-CMOS) is proposed. Expand
A 1-V high-speed MTCMOS circuit scheme for power-down applications
A new MTCMOS concept is proposed for power-down applications. This concept realises a new circuit scheme to hold data during the power-down period in which the power is not supplied. Low-power,… Expand
A 20 kbit associative memory LSI for artificial intelligence machines
TLDR
A 20 kb (512 words*40 b) CMOS associative-memory LSI is described. Expand
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