J. W. Slotboom

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The electro-thermal behavior of NPNs fabricated in a backwafer contacted silicon-on-glass integrated bipolar process has been investigated experimentally and the results are supported by 2D MEDICI simulations including the lattice heating equation. The devices are fabricated in silicon islands, the smallest of which is 23/spl times/10/spl times/0.94 /spl(More)
Electrothermal consequences of implementing bulk-silicon RF power MOS processes in the silicon-on-glass sub-strate transfer technology are investigated in this paper. Fabricated silicon-on-glass vertical double-diffused MOSFETs are measured on-wafer and very large thermal resistance values are extracted for each design. The influence of the thermal(More)
This report describes a modeling and experimental study of electron and hole impact ionization in silicon bipolar transistors. A method is developed to extract simultaneously the effective field (carrier temperature) dependent electron and hole ionization coefficients from multiplication coefficient data. A simple non local impact ionization model for(More)
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