J S Gong

We don’t have enough information about this author to calculate their statistics. If you think this is an error let us know.
Learn More
,/ This paper models high-speed VLSI interconnects by using a generic distributed RLC-tree. Through a detailed analysis of the distributed RLC-tree a two-pole approximation system is consequently established to formulate the performance-driven layout in MCM designs. An in-depth study of the formulated performance-driven layout problem reveals the interplay(More)
  • 1