• Citations Per Year
Learn More
A highly reliable and scalable non-volatile embedded memory cell and technology is described. This embedded technology operates at very low power, and has minimal impact on the analog and digital components used in the SoC design. The main objective of this technology development was to achieve high reliability and high data retention for automotive(More)
The existing embedded nonvolatile memory technologies have failed to deliver a cost effective solution for SoC applications. The major reason has been that most of these technologies were not designed specifically for the embedded applications. There have been two approaches for the embedded nonvolatile memories. One is to take the high density stand alone(More)
The paper gives a review of already existing 3-T XOR cells and provides an optimized value of (W/L) on the basis of simulation results obtained, so as to improve the threshold loss problems present in the existing designs of 3-T XOR cells thus helping improve the driving capability, however the driving capability is not sufficient for large circuits like(More)
Modified Booth Multiplier is one of the different techniques for signed multiplication. It is used normally as the fastest multiplier. Baugh Wooley Multiplier is another technique for signed multiplication. It is not widely used because of its complexity of its structure. Here design and implementation of 8 bit Modified Booth multiplier and Baugh Wooley(More)
In this paper the proposed design of RF MEMS capacitive switch is made of thin film of Au membrane and dielectric material of AlN. The advantages of using AlN as dielectric material rather than Si<sub>3</sub>N<sub>4</sub>, SiO<sub>2</sub>, Barium Strontium Titanate (BST) and HfO<sub>2</sub> in terms of isolation and insertion loss are extensively discussed(More)
This Image compression using Discrete Wavelet Transform has got application in many filed like biomedical, agriculture, digital video compression, wireless networks. In this paper we present a parallel-pipelined architecture for lifting based two dimensional DWT. We have used lifting based wavelet filter for image compression. Overall area has been reduced(More)
This paper shows the implementation and comparison of Carry Select Adder (CSA) using BEC (Binary Excess one Converter) and First Zero Finding (FZF) logic implementation techniques with optimization of the Full Adder (FA) cell by minimize number of transistors. The results have been analyzed and compared for implementation of both the above logic styles for(More)
  • 1