J. H. W. Lee

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Despite chip-package interaction (CPI) has been extensively used in nano-electronics industry, impact of CPI stress on transistor performance and reliability remains unclear. In this work, performance change of transistor featuring HK/MG planar and FinFET by 4-point bending experiments were conducted to study stress evolution. Finite-element modeling (FEM)(More)
Conventional time consuming methodology and idealistic stress conditions are no longer satisfactory under fierce competition between advanced technology development approaches. In this paper, the effectiveness of test arrays with simple built-in self-test (BIST) design in FinFET high-k/metal gate (HK/MG) technology have been demonstrated through three(More)
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