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A high performance W-CDMA base station power amplifier is presented, which uses an envelope tracking bias system along with an advanced 0.4um gate length LDMOS transistor, to achieve high efficiency. High linearity is also achieved by employing digital predistortion. For a target WCDMA envelope with a peak-to-average power ratio of 7.6 dB, the measured… (More)
A high performance GaN HFET WCDMA basestation power amplifier is presented, which uses an envelope tracking bias system to achieve high linearity and efficiency. The measured overall power-added efficiency (PAE) reached 50.7%, with a normalized power RMS error of 0.7% and ACLR of -52dBc at an offset frequency of 5MHz, at an average output power of 37.2W and… (More)
— Design techniques for handset power amplifiers are discussed, with emphasis on high efficiency architectures and CMOS technology. Experimental results with prototype circuits including Doherty, envelope tracking, outphasing and digital polar modulation are presented. Future design challenges are also highlighted.
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