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In this paper we describe an algorithm for transistor sizing in CMOS DCVSL (differential cascode voltage switch logic) digital circuits. Our proposed method has two different approaches with low computational burden, mathematical based and genetic algorithm based. Using our transistor sizing algorithm, we minimized the propagation delay of a DCVSL(More)
In this paper, a new and quick method is introduced for speech enhancement. The base or basic of this method is due to filtering the singular value which is obtained from SVD. The efficiency of the proposed methods is its strong capability and the speed of in reduction the noise effect and also does not have the typical “musical tone”, which(More)
In this paper a new approach for speech enhancement is presented. The proposed algorithm is based on singular value decomposition (SVD) and wavelet transform. A model of contaminant noise is estimated by using SVD in the recommended method and then, using of noise estimation determines thresholding value. Needlessness of silence frame in order to estimate(More)
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