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The interaction between sub-melt laser annealing and an embedded Si<sub>1-x</sub>Ge<sub>x</sub> source/drain (S/D) module has been studied in more detail by means of a PFET transistor evaluation and blanket layer characterization. If the integration of the Si<sub>1-x</sub>Ge<sub>x</sub> source/drain and laser anneal modules is not optimized, defects are(More)
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