J. F. Naviner

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High-pass /spl Delta//spl Sigma/ modulator has the advantage of immunity from the low frequency noise and is thus very effective in the parallel architectures. In this paper, we present the behavioral modelling and simulation of /spl Delta//spl Sigma/ modulators in VHDL-AMS, and in particular of the high-pass modulator. A set of models in VHDL-AMS suitable(More)
The development of fault tolerance techniques to enhance systems dependability is becoming an unavoidable task as IC industry enters in the nanoscale era. However, before consider the fault tolerant design, an accurate method of reliability evaluation is necessary. The knowledge of the natural error masking capabilities of a given circuit will be essential(More)
The arrival of CMOS integrated systems into nanoscale dimensions is presenting many challenges to designers and manufacturers concerning yield and reliability of integrated circuits. Traditional techniques to cope with these subjects are not as effective as they were before and many solutions are considered to allow CMOS evolution to continue according to(More)
This paper deals with design and implementation of channel selector for radio receivers. We propose a digital channel selector adapted to GSM and UMTS standards. Another feature of the designed processor is the ability to supply selected channel at several sampling rates, according to the post-selection blocks demand.
This paper deals with customized implementation of downsampling processors. We present an all-programmable generator of downsamplers to synthetise efficient decimator filters for many applications. This tool, written in VHDL language, is able to create cascade of generic FIR/CIC filters and helps fast exploration/evaluation of different hardware solutions(More)
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