Ivan P. Radivojevic

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This paper describes an exact symbolic formulation of control-dependent, resource-constrained scheduling. The technique provides a closed-form solution set in which all satisfying schedules are encapsulated in a compressed OBDD-based representation. This solution format greatly increases the flexibility of the synthesis task by enabling incremental(More)
Optimization of hardware resources for conditional data-flow graph behavior is particularly important when conditional behavior occurs in cyclic loops and maximiza-tion of throughput is desired. In this paper, an exact and efficient conditional resource sharing analysis using a guard-based control representation is presented. The analysis is transparent to(More)
It has been generally assumed that recently introduced symbolic techniques are applicable only to small scheduling problems. This report demonstrates that applicability of these techniques can be extended to larger dataflow graphs by: (i) using Zero-Suppressed BDDs, (ii) applying a set of interior constraints that reduce the size of intermediate solutions,(More)
Digital signal processors (DSPs) are suitable for a wide variety of computationally intensive real-time applications. This paper describes the architectural features of DSPs for intelligence and control applications, and the node configuration of the IX-n general-purpose neurocomputer, based on the commercially available DSP. DSPs provide high computing(More)
All Rights Reserved iv To my father. v Acknowledgments First, I would like to thank my advisor, Professor Forrest Brewer, for his guidance and support throughout my graduate studies at University of California, Santa Barbara. While my notebooks contain entries which questioned the sanity of his ideas, time has shown that the problem stemmed not from his(More)
We propose a new exact formulation of resource-constrained control/data-flow scheduling. Unlike current techniques, a solution is generated in which all satisfying schedules are encapsulated in a compressed representation. The technique supports various forms of code motion and extraction of parallelism not explicit in the input description. In addition,(More)
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