Ishmael Sameen

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This paper presents a novel unified and programmable 2-D Discrete Wavelet Transform (DWT) system architecture, which was implemented using a Field Programmable Gate Array (FPGA)-based Nios II soft-core processor working in combination with custom hardware accelerators generated through high-level synthesis. The proposed system architecture, synthesized on(More)
This paper proposes a programmable 2-D DWT system architecture designed for the JPEG-2000 standard. The proposed system architecture, derived from an iterative design space exploration process using Altera's C2H compiler, provides a significant performance acceleration of 2-D DWT when compared to an optimized 2-D DWT software implementation and is capable(More)
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